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19-4778; Rev 0a; 8/98
ANUAL N KIT M LUATIO ATA SHEET EVA WS D FOLLO
1.8V to 28V Input, PWM Step-Up Controllers in MAX
Features
o 1.8V Minimum Start-Up Voltage (MAX669) o Wide Input Voltage Range (1.8V to 28V) o Tiny 10-Pin MAX Package o Current-Mode PWM and Idle ModeTM Operation o Efficiency over 90% o Adjustable 100kHz to 500kHz Oscillator or SYNC Input o 220A Quiescent Current o Logic-Level Shutdown o Soft-Start
General Description
The MAX668/MAX669 constant-frequency, pulse-widthmodulating (PWM), current-mode DC-DC controllers are designed for a wide range of DC-DC conversion applications including step-up, SEPIC, flyback, and isolatedoutput configurations. Power levels of 20W or more can be controlled with conversion efficiencies of over 90%. The 1.8V to 28V input voltage range supports a wide range of battery and AC-powered inputs. An advanced BiCMOS design features low operating current (220A), adjustable operating frequency (100kHz to 500kHz), soft-start, and a SYNC input allowing the MAX668/ MAX669 oscillator to be locked to an external clock. DC-DC conversion efficiency is optimized with a low 100mV current-sense voltage as well as with Maxim's proprietary Idle ModeTM control scheme. The controller operates in PWM mode at medium and heavy loads for lowest noise and optimum efficiency, then pulses only as needed (with reduced inductor current) to reduce operating current and maximize efficiency under light loads. A logic-level shutdown input is also included, reducing supply current to 3.5A. The MAX669, optimized for low input voltages with a guaranteed start-up voltage of 1.8V, requires bootstrapped operation (IC powered from boosted output). It supports output voltages up to 28V. The MAX668 operates with inputs as low as 3V and can be connected in either a bootstrapped or non-bootstrapped (IC powered from input supply or other source) configuration. When not bootstrapped, it has no restriction on output voltage. Both ICs are available in an extremely compact 10-pin MAX package.
MAX668/MAX669
Applications
Cellular Telephones Telecom Hardware LANs and Network Systems POS Systems
Ordering Information
PART MAX668EUB MAX669EUB TEMP. RANGE -40C to +85C -40C to +85C PIN-PACKAGE 10 MAX 10 MAX
Idle Mode is a trademark of Maxim Integrated Products.
Typical Operating Circuit
VIN = 1.8V to 28V
Pin Configuration
TOP VIEW
VOUT = 28V SYNC/ SHDN FREQ VCC EXT CS+ LDO 1 FREQ GND 2 3 4 5 10 SYNC/SHDN 9 VCC EXT PGND CS+
MAX668 MAX669
8 7 6
MAX669
LDO PGND FB REF GND
REF FB
MAX
________________________________________________________________ Maxim Integrated Products
1
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1.8V to 28V Input, PWM Step-Up Controllers in MAX MAX668/MAX669
ABSOLUTE MAXIMUM RATINGS
VCC to GND ..........................................................-0.3V to +30V PGND to GND....................................................................0.3V SYNC/SHDN to GND .............................................-0.3V to +30V EXT, REF to GND.....................................-0.3V to (VLDO + 0.3V) LDO, FREQ, FB, CS+ to GND ................................ -0.3V to +6V LDO Output Current...........................................-1mA to +20mA REF Output Current..............................................-1mA to +1mA LDO Short Circuit to GND .........................................Momentary REF Short Circuit to GND ..........................................Continuous Continuous Power Dissipation (TA = +70C) 10-Pin MAX (derate 5.6mW/C above +70C) ..........444mW Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering,10sec) ..............................+300C
ELECTRICAL CHARACTERISTICS
(VCC = LDO = +5V, ROSC = 200k, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER PWM Controller PWM CONTROLLER Input Voltage Range, VCC Input Voltage Range with VCC Tied to LDO FB Threshold FB Threshold Load Regulation Typically 0.013% per mV on CS+; VCS+ range is 0 to 100mV for 0 to full load current. Typically 0.012% per % duty factor on EXT; EXT duty factor for a step-up is: 100% (1 - VIN/VOUT) VFB = 1.30V 85 5 CS+ forced to GND VFB = 1.30V, VCC = 3V to 28V SYNC/SHDN = GND, VCC = 28V 5V VCC 28V (includes LDO dropout) 3V VCC 28V (includes LDO dropout) MAX668 MAX669 3 1.8 2.7 1.225 1.250 0.013 28 28 5.5 1.275 V V V %/mV CONDITIONS MIN TYP MAX UNITS
FB Threshold Line Regulation FB Input Current Current Limit Threshold Idle Mode Current-Sense Threshold CS+ Input Current VCC Supply Current (Note 1) Shutdown Supply Current (VCC) REFERENCE AND LDO REGULATORS Reference and LDO Regulators
0.012 1 100 15 0.2 220 3.5 20 115 25 1 350 6
%/% nA mV mV A A A
4.50 2.65 2.40 1.225 1.0 225 425 85
5.00
5.50 V 5.50
LDO Output Voltage
LDO load = to 400
Undervoltage Lockout Threshold REF Output Voltage REF Load Regulation REF Undervoltage Lockout Threshold OSCILLATOR Oscillator
Sensed at LDO, falling edge, hysteresis = 1%, MAX668 only No load, CREF = 0.22F REF load = 0 to 50A Rising edge, 1% hysteresis ROSC = 200k 1%
2.50 1.250 -2 1.1 250 500 100
2.60 1.275 -10 1.2 275 575 115
V V mV V
Oscillator Frequency
ROSC = 100k 1% ROSC = 500k 1%
kHz
2
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1.8V to 28V Input, PWM Step-Up Controllers in MAX
ELECTRICAL CHARACTERISTICS (continued)
(VCC = LDO = +5V, ROSC = 200k, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER Maximum Duty Cycle Minimum EXT Pulse Width Minimum SYNC Input-Pulse Duty Cycle Minimum SYNC Input Low Pulse Width SYNC Input Rise/Fall Time SYNC Input Frequency Range SYNC/SHDN Falling Edge to Shutdown Delay SYNC/SHDN Input High Voltage SYNC/SHDN Input Low Voltage SYNC/SHDN Input Current EXT Sink/Source Current EXT On-Resistance 3.0V < VCC < 28V 1.8V < VCC < 3.0V (MAX669) 3.0V < VCC < 28V 1.8V < VCC < 3.0V (MAX669) SYNC/SHDN = 5V SYNC/SHDN = 28V EXT forced to 2V EXT high or low 0.5 1.5 1 2 5 2.0 1.5 0.45 0.30 3.0 6.5 Not tested 100 70 CONDITIONS ROSC = 200k 1% ROSC = 100k 1% ROSC = 500k 1% MIN 87 86 86 TYP 90 90 90 290 20 50 45 200 200 500 MAX 93 94 94 ns % ns ns kHz s V V A A % UNITS
MAX668/MAX669
ELECTRICAL CHARACTERISTICS
(VCC = LDO = +5V, ROSC = 200k, TA = -40C to +85C, unless otherwise noted.) (Note 2) PARAMETER PWM Controller PWM CONTROLLER Input Voltage Range, VCC Input Voltage Range with VCC Tied to LDO FB Threshold FB Input Current Current-Limit Threshold Idle Mode Current-Sense Threshold CS+ Input Current VCC Supply Current (Note 1) Shutdown Supply Current (VCC) Reference and LDO Regulators REFERENCE AND LDO REGULATORS LDO load = to 400 5V VCC 28V (includes LDO dropout) 3V VCC 28V (includes LDO dropout) 4.50 2.65 2.40 5.50 V 5.50 2.60 V V CS+ forced to GND VFB = 1.30V, VCC = 3V to 28V SYNC/SHDN = GND, VCC = 28V VFB = 1.30V 85 3 MAX668 MAX669 3 1.8 2.7 1.22 28 28 5.5 1.28 20 115 27 1 350 6 V V V nA mV mV A A A CONDITIONS MIN MAX UNITS
LDO Output Voltage
LDO Undervoltage Lockout Threshold
Sensed at LDO, falling edge, hysteresis = 1%, MAX669 only
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3
1.8V to 28V Input, PWM Step-Up Controllers in MAX MAX668/MAX669
ELECTRICAL CHARACTERISTICS (continued)
(VCC = LDO = +5V, ROSC = 200k, TA = -40C to +85C, unless otherwise noted.) PARAMETER REF Output Voltage REF Load Regulation REF Undervoltage Lockout Threshold OSCILLATOR ROSC = 200k 1% Oscillator Frequency ROSC =100k 1% ROSC = 500k 1% ROSC = 200k 1% Maximum Duty Cycle Minimum SYNC Input-Pulse Duty Cycle Minimum SYNC Input Low Pulse Width SYNC Input Rise/Fall Time SYNC Input Frequency Range SYNC/SHDN Input High Voltage SYNC/SHDN Input Low Voltage SYNC/SHDN Input Current EXT On-Resistance 3.0V < VCC < 28V 1.8V < VCC < 3.0V (MAX669) 3.0V < VCC < 28V 1.8V < VCC < 3.0V (MAX669) SYNC/SHDN = 5V SYNC/SHDN = 28V EXT high or low Not tested 100 2.0 1.5 0.45 0.30 3.0 6.5 5 ROSC = 100k 1% ROSC = 500k 1% 222 425 85 87 86 86 278 575 115 93 94 94 45 200 200 500 % ns ns kHz V V A % kHz CONDITIONS No load, CREF = 0.22F REF load = 0 to 50A Rising edge, 1% hysteresis 1.0 MIN 1.22 MAX 1.28 -10 1.2 UNITS V mV V
Note 1: This is the VCC current consumed when active but not switching. Does not include gate-drive current. Note 2: Limits at TA = -40C are guaranteed by design.
4
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1.8V to 28V Input, PWM Step-Up Controllers in MAX
Typical Operating Characteristics
(Circuits of Figures 2, 3, 4, and 5; TA = +25C; unless otherwise noted.)
EFFICIENCY vs. LOAD CURRENT (VOUT = 5V)
90 85 EFFICIENCY (%) EFFICIENCY (%) 80 75 70 65 60 55 50 1 10 100 1000 10,000 LOAD CURRENT (mA) BOOTSTRAPPED FIGURE 3 R4 = 200k 75 VIN = 2.7V VIN = 2V VIN = 3.6V VIN = 3.3V
MAX668 toc01
MAX668/MAX669
MAX668 EFFICIENCY vs. LOAD CURRENT (VOUT = 12V)
MAX668 toc02
MAX668 EFFICIENCY vs. LOAD CURRENT (VOUT = 24V)
VIN = 12V 90 EFFICIENCY (%) VIN = 8V
MAX668 toc03
95
95
95
90
85
85
VIN = 5V
80 VIN = 5V NON-BOOTSTRAPPED FIGURE 4 R4 = 200k 1 10 100 1000 10,000
80
75
NON-BOOTSTRAPPED FIGURE 4 R4 = 200k 1 10 100 1000 LOAD CURRENT (mA) 10,000
70 LOAD CURRENT (mA)
70
MAX669 MINIMUM START-UP VOLTAGE vs. LOAD CURRENT
MAX668 toc04
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX668 toc05
NO-LOAD SUPPLY CURRENT vs. SUPPLY VOLTAGE
3500 3000 2500 2000 1500 1000 500 0 VOUT = 12V BOOTSTRAPPED FIGURE 2 R4 = 200k
MAX668 toc06
3.0 MINIMUM START-UP VOLTAGE (V) 2.5 2.0 VOUT = 12V 1.5 1.0 0.5 0 0 VOUT = 5V
1200 1000 SUPPLY CURRENT (A) 800 600 400 200 MAX668 0 0 5 10 15 20 25 MAX669 CURRENT INTO VCC PIN ROSC = 500k
4000 NO-LOAD SUPPLY CURRENT (A)
BOOTSTRAPPED FIGURE 2 100 200 300 400 500 600 700 800 900 1000 LOAD CURRENT (mA)
30
0
2
4
6
8
10
12
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
SHUTDOWN CURRENT vs. SUPPLY VOLTAGE
MAX669
MAX668 toc07
SUPPLY CURRENT vs. TEMPERATURE
MAX668 toc08
LDO DROPOUT VOLTAGE vs. LDO CURRENT
MAX668 toc09
3.5 3.0 SHUTDOWN CURRENT (A) 2.5 2.0 1.5 1.0 0.5 CURRENT INTO VCC PIN 0 0 5 10 15 20 25
290 270 SUPPLY CURRENT (A) 250 230 ROSC = 200k 210 ROSC = 500k 190 170 150 ROSC = 100k
300 250 VIN = 3V 200 150 VIN = 4.5V 100 50 0
MAX668
30
-40
-20
0
20
40
60
80
100
LDO DROPOUT VOLTAGE (mV)
0.1
1 LDO CURRENT (mA)
10
20
SUPPLY VOLTAGE (V)
TEMPERATURE (C)
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5
1.8V to 28V Input, PWM Step-Up Controllers in MAX MAX668/MAX669
Typical Operating Characteristics (continued)
(Circuits of Figures 2, 3, 4, and 5; TA = +25C; unless otherwise noted.)
REFERENCE VOLTAGE vs. TEMPERATURE
MAX668 toc10
SWITCHING FREQUENCY vs. ROSC
450 SWITCHING FREQUENCY (kHz) 400 350 300 250 200 150 100 50 0 VCC = 5V 0 100 200 300 400 500
MAX668 toc11
1.250 1.249 REFERENCE VOLTAGE (V) 1.248 1.247 1.246 1.245 1.244 1.243 1.242 1.241 1.240 -40 -20 0 20 40 60 80 VCC = 5V
500
100
TEMPERATURE (C)
ROSC (k)
SWITCHING FREQUENCY vs. TEMPERATURE
100k SWITCHING FREQUENCY (kHz) 500 400 165k 300 200 499k 100 VIN = 5V 0 -40 -20 0 20 40 60 80 100 TEMPERATURE (C) 0 100 10
MAX668 toc12
EXT RISE/FALL TIME vs. CAPACITANCE
MAX668 toc13
600
60 50 EXT RISE/FALL TIME (ns) tR, VCC = 3.3V 40 30 20 tR, VCC = 5V tF, VCC = 5V 1000 CAPACITANCE (pF) tF, VCC = 3.3V
10,000
6
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1.8V to 28V Input, PWM Step-Up Controllers in MAX
Typical Operating Characteristics (continued)
(Circuits of Figures 2, 3, 4, and 5; TA = +25C; unless otherwise noted.)
EXITING SHUTDOWN
MAX668 toc14
MAX668/MAX669
ENTERING SHUTDOWN
MAX668 toc15
0V OUTPUT VOLTAGE 5V/div INDUCTOR CURRENT 2A/div SHUTDOWN VOLTAGE 5V/div 500s/div MAX668, VIN = 5V, VOUT = 12V, LOAD = 1.0A, ROSC = 100k, LOW VOLTAGE, NON-BOOTSTRAPPED 0A SHUTDOWN VOLTAGE 5V/div 0V
0V
OUTPUT VOLTAGE 5V/div 200s/div MAX668, VIN = 5V, VOUT = 12V, LOAD = 1.0A, LOW VOLTAGE, NON-BOOTSTRAPPED
0V
HEAVY-LOAD SWITCHING WAVEFORM
MAX668 toc16
LIGHT-LOAD SWITCHING WAVEFORM
VOUT 100mV/div AC-COUPLED
MAX668 toc17
VOUT 200mV/div AC-COUPLED
Q1, DRAIN 5V/div 0V
Q1, DRAIN 5V/div 0V
IL 1A/div 1s/div MAX668, VIN = 5V, VOUT = 12V, ILOAD = 1.0A, LOW VOLTAGE, NON-BOOTSTRAPPED
0A
IL 1A/div 1s/div MAX668, VIN = 5V, VOUT = 12V, ILOAD = 0.1A, LOW VOLTAGE, NON-BOOTSTRAPPED
0A
LOAD-TRANSIENT RESPONSE
MAX668 toc18
LINE-TRANSIENT RESPONSE
MAX668 toc19
OUTPUT VOLTAGE AC-COUPLED 100mV/div
OUTPUT VOLTAGE 100mV/div AC-COUPLED
LOAD CURRENT 1A/div 1ms/div MAX668, VIN = 5V, VOUT = 12V, ILOAD = 0.1A TO 1.0A, LOW VOLTAGE, NON-BOOTSTRAPPED
INPUT VOLTAGE 5V/div 20ms/div MAX668, VIN = 5V TO 8V, VOUT = 12V, LOAD = 1.0A, HIGH VOLTAGE, NON-BOOTSTRAPPED
0V
_______________________________________________________________________________________
7
1.8V to 28V Input, PWM Step-Up Controllers in MAX MAX668/MAX669
Pin Description
PIN 1 NAME LDO FUNCTION 5V On-Chip Regulator Output. This regulator powers all internal circuitry including the EXT gate driver. Bypass LDO to GND with a 1F or greater ceramic capacitor. Oscillator Frequency Set Input. A resistor from FREQ to GND sets the oscillator from 100kHz (ROSC = 500k) to 500kHz (ROSC = 100k). fOSC = 5 x 1010 / ROSC. ROSC is still required if an external clock is used at SYNC/SHDN. (See SYNC/SHDN and FREQ Inputs section.) Analog Ground 1.25V Reference Output. REF can source 50A. Bypass to GND with a 0.22F ceramic capacitor. Feedback Input. The FB threshold is 1.25V. Positive Current-Sense Input. Connect a current-sense resistor, RCS, between CS+ and PGND. Power Ground for EXT Gate Driver and Negative Current-Sense Input External MOSFET Gate-Driver Output. EXT swings from LDO to PGND. Input Supply to On-Chip LDO Regulator. VCC accepts inputs up to 28V. Bypass to GND with a 0.1F ceramic capacitor. Shutdown control and Synchronization Input. There are three operating modes: * SYNC/SHDN low: DC-DC off. * SYNC/SHDN high: DC-DC on with oscillator frequency set at FREQ by ROSC. * SYNC/SHDN clocked: DC-DC on with operating frequency set by SYNC clock input. DC-DC conversion cycles initiate on rising edge of input clock.
2 3 4 5 6 7 8 9
FREQ GND REF FB CS+ PGND EXT VCC
10
SYNC/ SHDN
Detailed Description
The MAX668/MAX669 current-mode PWM controllers operate in a wide range of DC-DC conversion applications, including boost, SEPIC, flyback, and isolated output configurations. Optimum conversion efficiency is maintained over a wide range of loads by employing both PWM operation and Maxim's proprietary Idle Mode control to minimize operating current at light loads. Other features include shutdown, adjustable internal operating frequency or synchronization to an external clock, soft start, adjustable current limit, and a wide (1.8V to 28V) input range.
28V. Bootstrapping is required because the MAX669 does not have undervoltage lockout, but instead drives EXT with an open-loop, 50% duty-cycle start-up oscillator when LDO is below 2.5V. It switches to closed-loop operation only when LDO exceeds 2.5V. If a non-bootstrapped connection is used with the MAX669 and if VCC (the input voltage) remains below 2.7V, the output voltage will soar above the regulation point. Table 2 recommends the appropriate device for each biasing option.
Table 1. MAX668/MAX669 Comparison
FEATURE VCC Input Range 3V to 28V Bootstrapped or nonbootstrapped. VCC can be connected to input, output, or other voltage source such as a logic supply. IC stops switching for LDO below 2.5V. Yes MAX668 MAX669 1.8V to 28V Must be bootstrapped (VCC must be connected to boosted output voltage, VOUT). No When LDO is above 2.5V
MAX668 vs. MAX669 Differences
Differences between the MAX668 and MAX669 relate to their use in bootstrapped or non-bootstrapped circuits (Table 1). The MAX668 operates with inputs as low as 3V and can be connected in either a bootstrapped or non-bootstrapped (IC powered from input supply or other source) configuration. When not bootstrapped, the MAX668 has no restriction on output voltage. When bootstrapped, the output cannot exceed 28V. The MAX669 is optimized for low input voltages (down to 1.8V) and requires bootstrapped operation (IC powered from VOUT) with output voltages no greater than
8
Operation
Undervoltage Lockout Soft-Start
_______________________________________________________________________________________
1.8V to 28V Input, PWM Step-Up Controllers in MAX
PWM Controller
The heart of the MAX668/MAX669 current-mode PWM controller is a BiCMOS multi-input comparator that simultaneously processes the output-error signal, the current-sense signal, and a slope-compensation ramp (Figure 1). The main PWM comparator is direct summing, lacking a traditional error amplifier and its associated phase shift. The direct summing configuration approaches ideal cycle-by-cycle control over the output voltage since there is no conventional error amp in the feedback path. In PWM mode, the controller uses fixed-frequency, current-mode operation where the duty ratio is set by the input/output voltage ratio (duty ratio = (VOUT - VIN) / VIN in the boost configuration). The current-mode feedback loop regulates peak inductor current as a function of the output error signal. At light loads the controller enters Idle Mode. During Idle Mode, switching pulses are provided only as needed to service the load, and operating current is minimized to provide best light-load efficiency. The minimum-current comparator threshold is 15mV, or 15% of the full-load value (IMAX) of 100mV. When the controller is synchronized to an external clock, Idle Mode occurs only at very light loads.
Bootstrapped/Non-Bootstrapped Operation
Low-Dropout Regulator (LDO) Several IC biasing options, including bootstrapped and non-bootstrapped operation, are made possible by an on-chip, low-dropout 5V regulator. The regulator input is at VCC, while its output is at LDO. All MAX668/MAX669 functions, including EXT, are internally powered from LDO. The V CC -to-LDO dropout voltage is typically 200mV (300mV max at 12mA), so that when VCC is less than 5.2V, LDO is typically VCC - 200mV. When LDO is in dropout, the MAX668/MAX669 still operate with VCC as low as 3V (as long as LDO exceeds 2.7V), but with reduced amplitude FET drive at EXT. The maximum VCC input voltage is 28V. LDO can supply up to 12mA to power the IC, supply gate charge through EXT to the external FET, and supply small external loads. When driving particularly large FETs at high switching rates, little or no LDO current may be available for external loads. For example, when switched at 500kHz, a large FET with 20nC gate charge requires 20nC x 500kHz, or 10mA. VCC and LDO allow a variety of biasing connections to optimize efficiency, circuit quiescent current, and fullload start-up behavior for different input and output voltage ranges. Connections are shown in Figures 2, 3, 4, and 5. The characteristics of each are outlined in Table 1.
MAX668/MAX669
VCC MAX669 ONLY 1.25V ANTISAT LDO R1 552k UVLO R2 276k R3 276k FB CS+ CURRENT SENSE SLOPE COMPENSATION 100mV IMAX 1.25V MAIN PWM COMPARATOR +A X6 -A +C -C X1 +S X1 -S REF EXT MUX 0 1 PGND LOW-VOLTAGE START-UP OSCILLATOR (MAX669 ONLY) LDO
MAX668 MAX669
SYNC/SHDN FREQ
BIAS OSC OSC
15mV
IMIN
SQ R
Figure 1. MAX668/MAX669 Functional Diagram
_______________________________________________________________________________________ 9
1.8V to 28V Input, PWM Step-Up Controllers in MAX MAX668/MAX669
VIN = 1.8V to 12V C1 68F 20V L1 4.7H
1 C4 1F 9 C2 0.1F
LDO
EXT
8 6
VOUT = 12V @ 0.5A N1 D1 MBRS340T3 IRF7401 R1 0.02 C5 68F 20V C6 68F 20V C8 0.1F R2 218k 1%
MAX669
VCC
CS+
10 SYNC/ SHDN 4 REF C3 0.22F 2 FREQ
PGND FB GND
7 5 3
C7 220pF
R3 24.9k 1%
R4 100k 1%
Figure 2. MAX669 High-Voltage Bootstrapped Configuration
VIN = 1.8V to 5V
C1 68F 10V
L1 4.7H
1 C2 1F 9
LDO
EXT
8 6 R1 0.02
VOUT = 5V @ 1A D1 MBRS340T3 FDS6680 IRF7401 N1 C4 68F 10V C5 68F 10V C6 0.1F R2 75k 1%
MAX669
VCC
CS+
10 SYNC/ SHDN 4 REF C3 0.22F 2 FREQ
PGND FB GND
7 5 3 C7 220pF
R3 24.9k 1%
R4 100k 1%
Figure 3. MAX669 Low-Voltage Bootstrapped Configuration
Bootstrapped Operation With bootstrapped operation, the IC is powered from the circuit output (V OUT ). This improves efficiency when the input voltage is low, since EXT drives the FET with a higher gate voltage than would be available from the low-voltage input. Higher gate voltage reduces the FET on-resistance, increasing efficiency. Other (undesirable) characteristics of bootstrapped operation are increased IC operating power (since it has a higher operating voltage) and reduced ability to start up with high load current at low input voltages. If the input volt10
age range extends below 2.7V, then bootstrapped operation with the MAX669 is the only option. With VCC connected to VOUT, as in Figure 2, EXT voltage swing is 5V when VCC is 5.2V or more, and VCC 0.2V when VCC is less than 5.2V. If the output voltage does not exceed 5.5V, the on-chip regulator can be disabled by connecting VCC to LDO (Figure 3). This eliminates the LDO forward drop and supplies maximum gate drive to the external FET.
______________________________________________________________________________________
1.8V to 28V Input, PWM Step-Up Controllers in MAX MAX668/MAX669
VIN = 3V to 12V C1 68F 20V L1 4.7H VOUT = 12V @ 1A D1 MBRS340T3 FDS6680 R1 0.02 PGND FB GND 7 5 3 C7 220pF R3 24.9k 1% N1 C5 68F 20V C6 68F 20V C8 0.1F R2 218k 1%
1 C4 1F 9 C2 0.1F
LDO
EXT
8 6
MAX668
VCC
CS+
10 SYNC/ SHDN 4 REF C3 0.22F 2 R4 100k 1% FREQ
Figure 4. MAX668 High-Voltage Non-Bootstrapped Configuration
VIN = 2.7V to 5.5V
C1 68F 10V 1 C2 1F 9 VCC PGND FB GND 7 5 3
L1 4.7H 8 6 R1 0.02 VOUT = 12V @ 1A D1 MBRS340T3 FDS6680 N1 C4 68F 20V C5 68F 20V C6 0.1F R2 218k 1%
LDO
EXT
MAX668
CS+
10 SYNC/ SHDN 4 REF C3 0.22F 2 R4 100k 1% FREQ
C7 220pF
R3 24.9k 1%
Figure 5. MAX668 Low-Voltage Non-Bootstrapped Configuration
Non-Bootstrapped Operation With non-bootstrapped operation, the IC is powered from the input voltage (VIN) or another source, such as a logic supply. Non-bootstrapped operation (Figure 4) is recommended (but not required) for input voltages above 5V, since the EXT amplitude (limited to 5V by LDO) at this voltage range is no higher than it would be with bootstrapped operation. Note that non-bootstrapped operation is required if the output voltage exceeds 28V, since this level is too high to safely con-
nect to VCC. Also note that only the MAX668 can be used with non-bootstrapped operation. If the input voltage does not exceed 5.5V, the on-chip regulator can be disabled by connecting VCC to LDO (Figure 5). This eliminates the regulator forward drop and supplies the maximum gate drive to the external FET for lowest on-resistance. Disabling the regulator also reduces the non-bootstrapped minimum input voltage from 3V to 2.7V.
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11
1.8V to 28V Input, PWM Step-Up Controllers in MAX MAX668/MAX669
Table 2. Bootstrapped and Non-Bootstrapped Configurations
CONFIGURATION FIGURE USE WITH: INPUT VOLTAGE RANGE* (V) OUTPUT VOLTAGE RANGE (V) COMMENTS
High-Voltage, Bootstrapped
Figure 2
MAX669
1.8 to 28
3V to 28
Connect VCC to VOUT. Provides maximum external FET gate drive for low-voltage (Input <3V) to highvoltage (output >5.5V) boost circuits. VOUT cannot exceed 28V. Connect VOUT to VCC and LDO. Provides maximum possible external FET gate drive for low-voltage designs, but limits VOUT to 5.5V or less. Connect VIN to VCC. Provides widest input and output range, but external FET gate drive is reduced for VIN below 5V. Connect VIN to VCC and LDO. FET gate-drive amplitude = VIN for logic-supply (input 3V to 5.5V) to high-voltage (output >5.5V) boost circuits. IC operating power is less than in Figure 4, since IC current does not pass through the LDO regulator. Connect VCC and LDO to a separate supply (VBIAS) that powers only the IC. FET gate-drive amplitude = VBIAS. Input power source (VIN) and output voltage range (VOUT) are not restricted, except that VOUT must exceed VIN.
Low-Voltage, Bootstrapped
Figure 3
MAX669
1.8 to 5.5
2.7 to 5.5
High-Voltage, Non-Bootstrapped
Figure 4
MAX668
3 to 28
VIN to
Low-Voltage, Non-Bootstrapped
Figure 5
MAX668
2.7 to 5.5
VIN to
Extra IC supply, Non-Bootstrapped
None
MAX668
Not Restricted
VIN to
* For standard step-up DC-DC circuits (as in Figures 2, 3, 4, and 5), regulation cannot be maintained if VIN exceeds VOUT. SEPIC and transformer-based circuits do not have this limitation.
In addition to the configurations shown in Table 2, the following guidelines may help when selecting a configuration: 1) If V IN is ever below 2.7V, V CC must be bootstrapped to VOUT and the MAX669 must be used. If VOUT never exceeds 5.5V, LDO may be shorted to VCC and VOUT to eliminate the dropout voltage of the LDO regulator. 2) If VIN is greater than 3.0V, VCC can be powered from VIN, rather than from VOUT (non-bootstrapped). This can save quiescent power consumption, especially when V OUT is large. If V IN never exceeds 5.5V, LDO may be shorted to VCC and VIN to eliminate the dropout voltage of the LDO regulator.
3) If VIN is in the 3V to 4.5V range (i.e., 1-cell Li-Ion or 3-cell NiMH battery range), bootstrapping VCC from VOUT, although not required, may increase overall efficiency by increasing gate drive (and reducing FET resistance) at the expense of quiescent power consumption. 4) If VIN always exceeds 4.5V, VCC should be tied to V IN , since bootstrapping from V OUT does not increase gate drive from EXT but does increase quiescent power dissipation.
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1.8V to 28V Input, PWM Step-Up Controllers in MAX
SYNC/SHDN and FREQ Inputs
The SYNC/SHDN pin provides both external-clock synchronization (if desired) and shutdown control. When SYNC/SHDN is low, all IC functions are shut down. A logic high at SYNC/SHDN selects operation at a frequency set by ROSC, connected from FREQ to GND. The relationship between fOSC and ROSC is: ROSC = 5 x 1010 / fOSC So a 500kHz operating frequency, for example, is set with ROSC = 100k. Rising clock edges on SYNC/SHDN are interpreted as synchronization inputs. If the sync signal is lost while SYNC/SHDN is high, the internal oscillator takes over at the end of the last cycle and the frequency is returned to the rate set by ROSC. If sync is lost with SYNC/SHDN low, the IC waits for 70s before shutting down. This maintains output regulation even with intermittent sync signals. When an external sync signal is used, Idle Mode switchover at the 15mV current-sense threshold is disabled so that Idle Mode only occurs at very light loads. Also, ROSC should be set for a frequency 15% below the SYNC clock rate: ROSC(SYNC) = 5 x 1010 / (0.85 x fSYNC) 1) Noise considerations may dictate setting (or synchronizing) fOSC above or below a certain frequency or band of frequencies, particularly in RF applications. 2) Higher frequencies allow the use of smaller value (hence smaller size) inductors and capacitors. 3) Higher frequencies consume more operating power both to operate the IC and to charge and discharge the gate of the external FET. This tends to reduce efficiency at light loads; however, the MAX668/ MAX669's Idle Mode feature substantially increases light-load efficiency. 4) Higher frequencies may exhibit poorer overall efficiency due to more transition losses in the FET; however, this shortcoming can often be nullified by trading some of the inductor and capacitor size benefits for lower-resistance components. The oscillator frequency is set by a resistor, ROSC, connected from FREQ to GND. ROSC must be connected whether or not the part is externally synchronized ROSC is in each case: ROSC = 5 x 1010 / fOSC when not using an external clock. ROSC(SYNC) = 5 x 1010 / (0.85 x fSYNC) when using an external clock, fSYNC.
MAX668/MAX669
Soft-Start
The MAX668/MAX669 feature a "digital" soft start which is preset and requires no external capacitor. Upon start-up, the peak inductor increments from 1/5 of the value set by RCS, to the full current-limit value, in five steps over 1024 cycles of fOSC or fSYNC. For example, with an f OSC of 200kHz, the complete soft-start sequence takes 5ms. See the Typical Operating Characteristics for a photo of soft-start operation. Softstart is implemented: 1) when power is first applied to the IC, 2) when exiting shutdown with power already applied, and 3) when exiting undervoltage lockout. The MAX669's soft-start sequence does not start until LDO reaches 2.5V.
Setting the Output Voltage
The output voltage is set by two external resistors (R2 and R3, Figures 2, 3, 4, and 5). First select a value for R3 in the 10k to 1M range. R2 is then given by: R2 = R3 [(VOUT / VREF) - 1] where VREF is 1.25V.
Determining Inductance Value
For most MAX668/MAX669 boost designs, the inductor value (LIDEAL) can be derived from the following equation, which picks the optimum value for stability based on the MAX668/MAX669's internally set slope compensation: LIDEAL = VOUT / (4 x IOUT x fOSC) The MAX668/MAX669 allow significant latitude in inductor selection if LIDEAL is not a convenient value. This may happen if LIDEAL is a not a standard inductance (such as 10H, 22H, etc.), or if LIDEAL is too large to be obtained with suitable resistance and saturation-current rating in the desired size. Inductance values smaller than LIDEAL may be used with no adverse stability effects; however, the peak-to-peak inductor current (ILPP) will rise as L is reduced. This has the effect of raising the required ILPK for a given output power and also requiring larger output capacitance to maintain a
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Design Procedure
The MAX668/MAX669 can operate in a number of DCDC converter configurations including step-up, SEPIC (single-ended primary inductance converter), and flyback. The following design discussions are limited to step-up, although SEPIC and flyback examples are shown in the Application Circuits section.
Setting the Operating Frequency
The MAX668/MAX669 can be set to operate from 100kHz to 500kHz. Choice of operating frequency will depend on number of factors:
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1.8V to 28V Input, PWM Step-Up Controllers in MAX MAX668/MAX669
given output ripple. An inductance value larger than LIDEAL may also be used, but output-filter capacitance must be increased by the same proportion that L has to LIDEAL. See the Capacitor Selection section for more information on determining output filter values. Due the MAX668/MAX669's high switching frequencies, inductors with a ferrite core or equivalent are recommended. Powdered iron cores are not recommended due to their high losses at frequencies over 50kHz. old NFETs that specify on-resistance with a gatesource voltage (VGS) of 2.7V or less. When selecting an NFET, key parameters can include: 1) Total gate charge (Qg) 2) Reverse transfer capacitance or charge (CRSS) 3) On-resistance (RDS(ON)) 4) Maximum drain-to-source voltage (VDS(MAX)) 5) Minimum threshold voltage (VTH(MIN)) At high switching rates, dynamic characteristics (parameters 1 and 2 above) that predict switching losses may have more impact on efficiency than RDS(ON), which predicts DC losses. Qg includes all capacitances associated with charging the gate. In addition, this parameter helps predict the current needed to drive the gate at the selected operating frequency. The continuous LDO current for the FET gate is: IGATE = Qg x fOSC For example, the MMFT3055L has a typical Qg of 7nC (at VGS = 5V); therefore, the IGATE current at 500kHz is 3.5mA. Use the FET manufacturer's typical value for Qg in the above equation, since a maximum value (if supplied) is usually too conservative to be of use in estimating IGATE.
Determining Peak Inductor Current
The peak inductor current required for a particular output is: ILPEAK = ILDC + (ILPP / 2) where ILDC is the average DC input current and ILPP is the inductor peak-to-peak ripple current. The ILDC and ILPP terms are determined as follows: I (V + VD ) ILDC = OUT OUT (VIN - VSW ) where V D is the forward voltage drop across the Schottky rectifier diode (D1), and V SW is the drop across the external FET, when on. (VIN - VSW ) (VOUT + VD - VIN ) L x fOSC (VOUT + VD ) where L is the inductor value. The saturation rating of the selected inductor should meet or exceed the calculated value for ILPEAK, although most coil types can be operated up to 20% over their saturation rating without difficulty. In addition to the saturation criteria, the inductor should have as low a series resistance as possible. For continuous inductor current, the power loss in the inductor resistance, PLR, is approximated by: PLR (IOUT x VOUT / VIN)2 x RL where RL is the inductor series resistance. Once the peak inductor current is selected, the currentsense resistor (RCS) is determined by: ILPP = RCS = 85mV / ILPEAK For high peak inductor currents (>1A), Kelvin sensing connections should be used to connect CS+ and PGND to RCS. PGND and GND should be tied together at the ground side of RCS.
Diode Selection
The MAX668/MAX669's high switching frequency demands a high-speed rectifier. Schottky diodes are recommended for most applications because of their fast recovery time and low forward voltage. Ensure that the diode's average current rating is adequate using the diode manufacturer's data, or approximate it with the following formula: I -I IDIODE = IOUT + LPEAK OUT 3 Also, the diode reverse breakdown voltage must exceed VOUT. For high output voltages (50V or above), Schottky diodes may not be practical because of this voltage requirement. In these cases, use a high-speed silicon rectifier with adequate reverse voltage.
Capacitor Selection
Output Filter Capacitor The minimum output filter capacitance that ensures stability is: (7.5V x L / L IDEAL ) COUT(MIN) = (2RCS x VIN(MIN) x fOSC )
where VIN(MIN) is the minimum expected input voltage. Typically COUT(MIN), though sufficient for stability, will
Power MOSFET Selection
The MAX668/MAX669 drive a wide variety of N-channel power MOSFETs (NFETs). Since LDO limits the EXT output gate drive to no more than 5V, a logic-level NFET is required. Best performance, especially at low input voltages (below 5V), is achieved with low-thresh14
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1.8V to 28V Input, PWM Step-Up Controllers in MAX
not be adequate for low output voltage ripple. Since output ripple in boost DC-DC designs is dominated by capacitor equivalent series resistance (ESR), a capacitance value 2 or 3 times larger than COUT(MIN) is typically needed. Low-ESR types must be used. Output ripple due to ESR is: VRIPPLE(ESR) = ILPEAK x ESRCOUT In bootstrapped configurations with the MAX668 or MAX669, there may be circumstances where full load current can only be applied after the circuit has started and the output is near its set value. As the input voltage drops, this limitation becomes more severe. This characteristic of all bootstrapped designs occurs when the MOSFET gate is not fully driven until the output voltage rises. This is problematic because a heavily loaded output cannot rise until the MOSFET has low on-resistance. In such situations, low-threshold FETs (VTH < VIN(MIN)) are the most effective solution. The Typical Operating Characteristics section shows plots of startup voltage versus load current for a typical bootstrapped design.
MAX668/MAX669
Input Capacitor The input capacitor (CIN) in boost designs reduces the current peaks drawn from the input supply and reduces noise injection. The value of CIN is largely determined by the source impedance of the input supply. High source impedance requires high input capacitance, particularly as the input voltage falls. Since step-up DCDC converters act as "constant-power" loads to their input supply, input current rises as input voltage falls. Consequently, in low-input-voltage designs, increasing CIN and/or lowering its ESR can add as many as five percentage points to conversion efficiency. A good starting point is to use the same capacitance value for CIN as for COUT. Bypass Capacitors In addition to CIN and COUT, three ceramic bypass capacitors are also required with the MAX668/MAX669. Bypass REF to GND with 0.22F or more. Bypass LDO to GND with 1F or more. And bypass VCC to GND with 0.1F or more. All bypass capacitors should be located as close to their respective pins as possible. Compensation Capacitor Output ripple voltage due to COUT ESR affects loop stability by introducing a left half-plane zero. A small capacitor connected from FB to GND forms a pole with the feedback resistance that cancels the ESR zero. The optimum compensation value is:
ESRCOUT CFB = COUT x (R2 x R3) / (R2 + R3) where R2 and R3 are the feedback resistors (Figures 2, 3, 4, and 5). If the calculated value for CFB results in a non-standard capacitance value, values from 0.5CFB to 1.5CFB will also provide sufficient compensation.
Layout Considerations
Due to high current levels and fast switching waveforms that radiate noise, proper PC board layout is essential. Protect sensitive analog grounds by using a star ground configuration. Minimize ground noise by connecting GND, PGND, the input bypass-capacitor ground lead, and the output-filter ground lead to a single point (star ground configuration). Also, minimize trace lengths to reduce stray capacitance, trace resistance, and radiated noise. The trace between the external gain-setting resistors and the FB pin must be extremely short, as must the trace between GND and PGND.
Application Circuits
Low-Voltage Boost Circuit Figure 3 shows the MAX669 operating in a low-voltage boost application. The MAX669 is configured in the bootstrapped mode to improve low input voltage performance. The IRF7401 N-channel MOSFET was selected for Q1 in this application because of its very low 0.7V gate threshold voltage (VGS). This circuit provides a 5V output at greater than 2A of output current and operates with input voltages as low as 1.8V. Efficiency is typically in the 85% to 90% range. +12V Boost Application Figure 5 shows the MAX668 operating in a 5V to 12V boost application. This circuit provides output currents of greater than 1A at a typical efficiency of 92%. The MAX668 is operated in non-bootstrapped mode to minimize the input supply current. This achieves maximum light-load efficiency. If input voltages below 5V are used, the IC should be operated in bootstrapped mode to achieve best low-voltage performance. 4-Cell to +5V SEPIC Power Supply Figure 6 shows the MAX668 in a SEPIC (single-ended primary inductance converter) configuration. This configuration is useful when the input voltage can be either
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Applications Information
Starting Under Load
In non-bootstrapped configurations (Figures 4 and 5), the MAX668 can start up with any combination of output load and input voltage at which it can operate when already started. In other words, there are no special limitations to start-up in non-bootstrapped circuits.
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1.8V to 28V Input, PWM Step-Up Controllers in MAX MAX668/MAX669
larger or smaller than the output voltage, such as when converting four NiMH, NiCd, or Alkaline cells to a 5V output. The SEPIC configuration is often a good choice for combined step-up/step-down applications. The N-channel MOSFET (Q1) must be selected to withstand a drain-to-source voltage (VDS) greater than the sum of the input and output voltages. The coupling capacitor (C2) must be a low-ESR type to achieve maximum efficiency. C2 must also be able to handle high ripple currents; ordinary tantalum capacitors should not be used for high-current designs. The circuit in Figure 6 provides greater than 1A output current at 5V when operating with an input voltage from 3V to 25V. Efficiency will typically be between 70% and 85%, depending upon the input voltage and output current.
Isolated +5V to +5V Power Supply The circuit of Figure 7 provides a 5V isolated output at 400mA from a 5V input power supply. Transformer T1 provides electrical isolation for the forward path of the converter, while the TLV431 shunt regulator and MOC211 opto-isolator provide an isolated feedback error voltage for the converter. The output voltage is set by resistors R2 and R3 such that the mid-point of the divider is 1.24V (threshold of TLV431). Output voltage can be adjusted from 1.24V to 6V by selecting the proper ratio for R2 and R3. For output voltages greater than 6V, substitute the TL431 for the TLV431, and use 2.5V as the voltage at the midpoint of the voltagedivider.
VIN 3V to 25V
22F x 3 @ 35V
4.9H L1 CTX5-4 D1 40V VOUT 5V @ 1A C2 10F @ 35V 8 Q1 30V FDS6680 C3 68F x 3
9 VCC 1 LDO 2 1F FREQ
10 SHDN
MAX668
EXT
R3 100k 0.22F
4
REF CS+ 6 R4 0.02 R1 75k
5
FB GND 3 PGND 7
D1: MBR5340T3, 3A, 40V SCHOTTKY DIODE R4: WSL-2512-R020F, 0.02 C3: AVX TPSZ686M020R0150, 68F, 150m ESR
C4 520pF
R2 25k
Figure 6. MAX668 in SEPIC Configuration
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1.8V to 28V Input, PWM Step-Up Controllers in MAX MAX668/MAX669
MBR0540L VIN = +5V 220F 10V 1F T1 2:1 LDO SHDN CS+ FB VCC EXT IRF7603 220F 10V +5V RETURN 47H +5V @ 400mA
MBR0540L
MAX668
PGND REF FREQ GND 0.1
0.22F 100k 510 MOC211 R2 301k 1%
10k 0.1F TLV431 R3 100k 1%
0.068F
610
T1: COILTRONICS CTX03-14232
Figure 7. Isolated +5V to +5V at 400mA Power Supply
Chip Information
TRANSISTOR COUNT: 1861
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1.8V to 28V Input, PWM Step-Up Controllers in MAX MAX668/MAX669
Package Information
10LUMAXB.EPS
18
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